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Fmc i2c #211

Merged
merged 4 commits into from
Oct 4, 2024
Merged

Fmc i2c #211

merged 4 commits into from
Oct 4, 2024

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glennchid
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@glennchid glennchid commented Sep 17, 2024

Adding provision for I2C monitoring of the SFP DDMI, and running PandA sync, via the HTG SFPx4-FMC on the ST1.
This will be useful for FMC cards which carry I2C signals on the LA pins.

Details of the DDMI interface can be found here: https://www.google.com/url?sa=t&source=web&rct=j&opi=89978449&url=https://members.snia.org/document/dl/25916&ved=2ahUKEwiR3fSlqcyIAxWRW0EAHZ6oFH8QFnoECAwQAQ&usg=AOvVaw1_H0SPUbcdr31PrbjqvBsM

Useful registers could be:
20 - Vendor
84 - Date of manufacture
92 - DDMI status
110 - SFP status (TX_disabled, RX_LOS etc)
102 - TX power
104 - RX power

Running PandA-sync on ST1 requires the Si570 to be configured for 125 MHz (default is 156.25 MHz).
This can be done manually as follows:

  1. Freeze the DCO: i2cset -y 1 55 89 0x18
  2. Set new output divider setting: i2cset -y 1 55 7 0x21
  3. Unfreeze DCO and alert new freq (calibrate PLL): i2cset -y 1 55 89 0x08 && i2cset -y 1 55 87 0x40 (need to be back-to-back or at least within 10 ms).

Note as DCO frequency is not changing (both 156.25 and 125 MHz are both sub-multiples of 5GHz), only step 2 is strictly required.

See tickets #212 and #213

@tomtrafford tomtrafford merged commit 75f875a into master Oct 4, 2024
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@glennchid glennchid deleted the fmc-i2c branch October 9, 2024 17:52
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3 participants